Bulgaria VLT Firmware: Legacy SAS Encryption Keys
Every Bulgarian VLT operator running firmware built before the 2018 SAS protocol revision is sitting on a time bomb, and the fuse is a 56-bit DES key that was never rotated. I have pulled apart enough dead cabinets in Sofia and Plovdiv backrooms to say this without flinching: the legacy SAS encryption keys baked into these firmware images are the single softest attack surface in the entire jurisdiction. 🎰
The mechanism is embarrassingly simple. Bulgarian VLTs certified under the older SAS 6.01 and 6.02 stacks hardcode a key derivation seed inside the bootloader flash. That seed feeds a deterministic DES routine, and because the firmware image is signed but the key material is not isolated in a secure element, anyone with a cheap SPI flasher and thirty minutes can dump the whole chain. The result is not just a theoretical break — it is a full SAS encryption key recovery path that lets you forge valid host-to-machine packets without ever touching the RNG.

Where the Key Material Actually Lives
Pop the lid on a typical Bulgarian-market cabinet and you will find an Atmel AT91 or an older STM32 sitting next to a Macronix SPI flash. The firmware partitions are laid out with a bootloader at 0x0000, a signed application block, and then — here is the killer — an unprotected configuration sector that stores the SAS key derivation table in cleartext. No OTP fuse protection, no encrypted key blob, nothing. The Bulgaria VLT firmware lineage treated physical access as the trust boundary, which was a defensible bet in 2012 and is a laughable one now.
I have seen operators argue that the tamper switch covers this. It does not. The tamper circuit only logs a door event and wipes volatile RAM; it never touches the SPI flash contents. Pull the flash chip with a hot-air station, read it on a bench programmer, and the legacy key table is yours in under a minute. 🔧
The DES Weakness Nobody Wants to Admit
Let us be brutally honest about the cipher itself. The legacy stack uses single-DES in CBC mode for host authentication packets. That is a 56-bit effective key space, and with a modern FPGA cluster you are looking at hours, not years. But you do not even need brute force because the key derivation table is right there in flash. The real exposure is the authentication nonce: the firmware generates it from a weak PRNG seeded with a fixed constant plus the cabinet serial. Predict the serial, and you predict every nonce.
This is the part that makes my blood pressure spike. Auditors keep signing off on these units because the certification test suite only checks functional compliance — it never probes key entropy or nonce randomness. The gap between what the certificate claims and what the silicon actually does is where every exploit lives.

Firmware Patching and the Signature Bypass
Here is the nasty detail most reverse engineers miss on their first pass: the application block is RSA-signed, but the bootloader verifies the signature only when a specific GPIO strap is low. Float that pin — or ground it through a carefully placed jumper — and the bootloader happily jumps into unsigned code. That means you can patch the DES routine to dump its round keys to a UART, rebuild the image, and the cabinet boots clean. The legacy SAS encryption keys fall out of the log in plain hex.
The Bulgarian certification regime never anticipated this because the strap was documented as a factory test mode. Factory test modes that survive into production are the oldest story in hardware security, and this firmware generation is a textbook case. 🛠️
Mitigation Reality Check
You cannot patch your way out of this on the existing hardware fleet. The key material has to move into a secure element, and the nonce generator has to be replaced with a proper hardware TRNG. Operators still running the old images should treat every cabinet as physically compromised the moment it leaves a secured cage. The only honest fix is a firmware generation that isolates key storage and enforces signature verification unconditionally — and until that ships, the legacy key table remains a permanent backdoor sitting in SPI flash at offset 0x1F400.